1. Field of the Invention
The invention relates to integrated circuit manufacturing technology, and more specifically, to processes for planarizing and smoothing surfaces of wafer-type semiconductor substrates, such as semiconductor wafers, through chemical mechanical and other polishing.
2. Description of the Related Art
Photolithographic optics-based processes are used in the manufacture of integrated circuits, and since these processes require accurate focusing to produce a precise image, surface planarity becomes an important issue. This is becoming increasingly critical as line widths are being reduced in size in order to make semiconductor devices even more compact, and to provide higher speeds. More accurate optical focusing for finer line widths results in a loss of “depth of field” (i.e., the focusing is very accurate only in a plane of very limited depth). Accordingly, a planar surface is essential to ensure good focusing to enable the photolithographic process to produce fine line width, compact high speed semiconductor devices.
There are several techniques for planarizing the surface of a semiconductor wafer. One of these is chemical mechanical polishing (CMP). As indicated in an article entitled “Chemical Mechanical Polishing: The Future of Sub Half Micron Devices,” Dr. Linton Salmon, Brigham Young University (15 Nov. 1996), CMP is now considered the most effective method yet for planarizing wafers with sub micron lines. In this process, a wafer is mounted on a rotary carrier or chuck with the integrated circuit side facing outward. A polishing pad is then brought into contact with the integrated circuit side. Pressure may be applied by the carrier and/or the platen to effectuate polishing. According to Salmon, in some CMP machines the wafer rotates while the polishing pad is stationary, in others the pad rotates while the wafer carrier is stationary, and in yet another type both the wafer carrier and the pad rotate simultaneously. The polishing pad may be pre-soaked and continually re-wet with a slurry that has a variety of abrasive particles suspended in a solution. Typically, the particles range in size from 30 to 1,100 nanometers. After planarization through polishing, the wafers go through a post-CMP clean up to remove residual slurry, metal particles, and other potential contaminants from its surface.
An important variable in planarization through CMP is “removal rate” which is the rate of removal of material from the surface of the semiconductor wafer being polished. Preferably, the rate of removal should be such that any surface peaks are preferentially flattened and the resultant surface should be as near perfectly planar as possible. There are several factors that may affect the rate of removal. For example, the nature of the slurry can have a dramatic effect. The slurry includes abrasive particles suspended in a solvent which selectively may soften certain features of the pattern on the semiconductor wafer surface, thereby affecting the relative rate of removal of those features vis-à-vis others. As indicated in the above article, “The purpose of the slurry is simple, yet understanding and modeling all the mechanical and chemical reactions involved is nearly impossible.” Accordingly, development of the CMP process has proceeded on a “trial and error basis.”
U.S. Pat. No. 5,554,064 relates to an apparatus for polishing semiconductor wafers through an orbital polishing motion. Such orbital polishers and others are now in commercial use, but it has been found that orbital polishers generally do not provide completely uniform stock removal across the entire surface of the wafer. An edgeband at the periphery of the disk is subject to a different polishing rate, as explained below.
Referring to FIG. 1A, a wafer 10 is held in a carrier 12 that is surrounded by a wear ring 16. As shown, the face of the wafer to be polished is in contact with a polish pad 18 backed by a platen 20. During orbital polishing, the polish pad 18 is brought into movement, as shown by the arrows in FIG. 1A. Thus, at least a portion of the polish pad near the edge or periphery of the wafer is in contact with the wear ring, which has significantly different properties than the wafer. It is believed by some that this difference in properties results in a different removal rate at the periphery of the wafer that forms an edgeband, illustrated in FIG. 1B. In the illustrated example, a 200 mm diameter wafer 12 is brought into contact with a polish pad 18, that is mounted a wave generator, as described in U.S. Pat. No. 5,554,064. As a consequence, the centerCp of the polish pad orbits about the center of spin Cs of the wave generator. Moreover, the center of the wafer Cw is offset from the center of spin of the wave generator by 0.375 in. (9.5 mm). It has been found that with these particular parameters, a differential removal rate edgeband of about 1.25 in. (31.75 mm) width would develop. Thus, while orbital polishers represent an advance in the art of semiconductor wafer polishing, even these advanced polishers have shortcomings.
Moreover, orbital polishers, in common with most other polishing apparatus, are subject to sensitivity based on the nature of the pad, pad platen, slurry, wafer carrier, pressure control and speed control. Accordingly, there are numerous factors that affect polish aside from the nature of the apparatus being used.
Semiconductor manufacturers consistently require CMP processes to improve over time. As semiconductor devices become ever more complex and device geometry and circuitry becomes finer, there exists a need to make the CMP removal rate more consistent from wafer to wafer, and wafer lot to wafer lot, while also making the polishing results more uniform across the entire surface of the wafer.